PCB Design Mistakes I've Made Twice
Ordering PCBs is cheap enough now that iteration is viable for hobby projects — five boards for $5 from JLCPCB, delivered in two weeks. The low cost makes the learning curve painless if you're systematic about documenting mistakes.
Mistake #1: power plane polygons that don't flood correctly. I had a GND pour that KiCad previewed as connected but had isolated islands around via clusters. The board manufactured fine but had a mysterious ground loop that took an oscilloscope session to diagnose. Fix: always run DRC with the pour generated, not just the schematic.
Mistake #2: component polarity on QFN packages. QFN chips have no pin 1 marker visible once soldered — you rely entirely on the silkscreen dot. I once rotated a footprint 180° in the library and didn't catch it in review. The chip got 3.3V on its ground pins and did not survive. Fix: use a different package when you can (SOIC has visible pin 1 markers), and zoom in on each polarised component in the 3D view before sending gerbers.
Mistake #3: wrong trace impedance on high-speed lines. USB differential pairs on FR4 at 1.6mm board thickness need 90Ω differential impedance, which is achieved with specific trace width and spacing (roughly 0.2mm trace, 0.2mm gap). My first USB board had traces copied from an SPI design — wrong impedance, packets corrupted at full speed, worked at low speed only. Fix: use an impedance calculator before routing any differential pair.